V. Sundaram, Fuhan Liu, S. Dalmia, J. Hobbs, E. Matoglu, M. Davis, T. Nonaka, J. Laskar, Madhavan Swaminathan, George E. White, Rao Tummala
{"title":"Digital and RF integration in system-on-a-package (SOP)","authors":"V. Sundaram, Fuhan Liu, S. Dalmia, J. Hobbs, E. Matoglu, M. Davis, T. Nonaka, J. Laskar, Madhavan Swaminathan, George E. White, Rao Tummala","doi":"10.1109/ECTC.2002.1008164","DOIUrl":null,"url":null,"abstract":"The Packaging Research Center (PRC) is developing system-on-a-package (SOP) technology, as a complimentary alternative to SOC, as the fundamental building block for next generation convergent systems with computing, telecom and consumer capabilities with data and voice. Any systems of this nature have to provide not only high-speed digital, but also high bandwidth optical, analog, RF and perhaps MEMS functions. The SOP technology being pursued at PRC with embedded digital, optical and RF functions addresses this need, optimizing the IC and the package for functions, performance, cost, size and reliability. The PRC is developing this complimentary alternative to SOC using a three tier strategy consisting of fundamental research innovations, enabling technology developments and system-level testbeds. Individual digital, optical and RF testbeds have been developed to enable the integration of novel packaging technologies like embedded passive and optical components, high density global interconnections and wafer level flip-chip assembly. A phased system testbed is being evolved from these three testbeds to develop new SOP convergent system platforms for a digital/optical/RF system implementation. This paper summarizes the latest PRC accomplishments in the development of SOP baseline processes and system testbeds and updates the progress from basic research and technology integration to system testbeds for SOP.","PeriodicalId":285713,"journal":{"name":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.2002.1008164","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 16
Abstract
The Packaging Research Center (PRC) is developing system-on-a-package (SOP) technology, as a complimentary alternative to SOC, as the fundamental building block for next generation convergent systems with computing, telecom and consumer capabilities with data and voice. Any systems of this nature have to provide not only high-speed digital, but also high bandwidth optical, analog, RF and perhaps MEMS functions. The SOP technology being pursued at PRC with embedded digital, optical and RF functions addresses this need, optimizing the IC and the package for functions, performance, cost, size and reliability. The PRC is developing this complimentary alternative to SOC using a three tier strategy consisting of fundamental research innovations, enabling technology developments and system-level testbeds. Individual digital, optical and RF testbeds have been developed to enable the integration of novel packaging technologies like embedded passive and optical components, high density global interconnections and wafer level flip-chip assembly. A phased system testbed is being evolved from these three testbeds to develop new SOP convergent system platforms for a digital/optical/RF system implementation. This paper summarizes the latest PRC accomplishments in the development of SOP baseline processes and system testbeds and updates the progress from basic research and technology integration to system testbeds for SOP.