DLL architecture for OFDM based VLC transceivers in FPGA

Luís Duarte, Luís Rodrigues, L. N. Alves, Carlos Ribeiro, M. Figueiredo
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Abstract

This paper addresses the problem of achieving high bandwidth in a DLL design for OFDM based VLC broadcast systems. It describes the implementation of efficient Data Link Layer (DLL) and Forward Error Correction (FEC) modules in a Xilinx FPGA. The proposed DLL aims at furnishing the adequate means to fragment and route both high data-rate (HDR) and moderate data-rate (MDR) service requests while maintaining a continuous transmission flow. The FEC modules aims at providing sufficient error correction capabilities with reasonable computation overheads. Another goal was to develop these modules under a globally asynchronous locally synchronous paradigm, ensuring high modularity and performance.
FPGA中基于OFDM的VLC收发器的DLL结构
本文研究了在基于OFDM的VLC广播系统中实现高带宽的动态链接设计问题。介绍了高效的数据链路层(DLL)和前向纠错(FEC)模块在Xilinx FPGA中的实现。所提议的DLL旨在提供适当的方法来分割和路由高数据速率(HDR)和中等数据速率(MDR)服务请求,同时保持连续的传输流。FEC模块旨在以合理的计算开销提供足够的纠错能力。另一个目标是在全局异步本地同步范式下开发这些模块,以确保高模块化和高性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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