ILP-based inter-die routing for 3D ICs

16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011) Pub Date : 2011-01-25 DOI:10.1109/ASPDAC.2011.5722209

Chia-Jen Chang, Pao-Jen Huang, Tai-Chen Chen, C. Liu

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引用次数: 12

Abstract

The 3D IC is an emerging technology. The primary emphasis on 3D-IC routing is the interface issues across dies. To handle the interface issue of connections, the inter-die routing, which uses micro bumps and two single-layer RDLs (Re-Distribution Layers) to achieve the connection between adjacent dies, is adopted. In this paper, we present an inter-die routing algorithm for 3D ICs with a pre-defined netlist. Our algorithm is based on integer linear programming (ILP) and adopts a two-stage technique of micro-bump assignment followed by non-regular RDL routing. First, the micro-bump assignment selects suitable micro-bumps for the pre-defined netlist such that no crossing problem exists inside the bounding boxes of each net. After the micro-bump assignment, the netlist is divided into two sub-netlists, one is for the upper RDL and the other is for the lower RDL. Second, the non-regular RDL routing determines minimum and non-crossing global paths for sub-netlists in the upper and lower RDLs individually. Experimental results show that our approach can obtain optimal wirelength and achieve 100% routability under reasonable CPU times.

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基于ilp的3D集成电路芯片间路由

3D集成电路是一项新兴技术。3D-IC路由的主要重点是跨芯片的接口问题。为了解决连接的接口问题，采用了模具间路由，利用微凸点和两个单层重分布层来实现相邻模具之间的连接。本文提出了一种具有预定义网表的三维集成电路的芯片间路由算法。该算法基于整数线性规划(ILP)，采用微碰撞分配和非规则RDL路由两阶段技术。首先，为预定义的网表选择合适的微凸点，使每个网的边界框内不存在交叉问题;在微碰撞分配后，将网络列表划分为两个子网络列表，一个用于上RDL，另一个用于下RDL。其次，非规则RDL路由分别确定上层RDL和下层RDL中的子网络列表的最小和非交叉全局路径。实验结果表明，在合理的CPU时间下，该方法可以获得最优的带宽和100%的路由可达性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

16th Asia and South Pacific Design Automation Conference (ASP-DAC 2011)

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