CMOS realization of a 2-layer CNN universal machine chip

Abstract

Some of the features of the biological retina can be modelled by a cellular neural network (CNN) composed of two dynamically coupled layers of locally connected elementary nonlinear processors. In order to explore the possibilities of these complex spatio-temporal dynamics in image processing, a prototype chip has been developed by implementing this CNN model with analog signal processing blocks. This chip has been designed in a 0.5/spl mu/m CMOS technology. Design challenges, trade-offs and the building blocks of such a high-complexity system (0.5 /spl times/ 10/sup 6/ transistors, most of them operating in analog mode) are presented in this paper.