Measurement of N-well sheet resistance under p/sup +/ diffusion and p channel gate

ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307) Pub Date : 1999-03-15 DOI:10.1109/ICMTS.1999.766214

R. A. Ashton

引用次数: 0

Abstract

Van der Pauw test structures for the measurement of N-well sheet resistance under p/sup +/ diffusion and under p channel gate for CMOS technologies on p substrates are presented.

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p/sup +/扩散和p通道栅极下n孔片电阻的测量

提出了在p基板上测量p/sup +/扩散和p通道栅极下的n阱片电阻的Van der Pauw测试结构。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

ICMTS 1999. Proceedings of 1999 International Conference on Microelectronic Test Structures (Cat. No.99CH36307)

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