Analog Tuning of Floating-Gate Cells with Sub-Elementary Charge Accuracy for In-Memory Computing Applications

Abstract

The process of ESF3 memory cell analog tuning for neuromorphic applications was studied with a single-electron accuracy. It was experimentally shown that the number of electrons injected to the floating gate during incremental programming pulses follows Poisson distribution, which sets a fundamental limit for the minimum width of the tuned cell current/threshold voltage distributions. The new method for analog tuning, based on capacitive coupling, allows one to override the electron charge granularity limitation, and to achieve the sub-elementary charge tuning accuracy.