Low-power, folded cascode near rail-to-rail OTA for moderate frequency signal processing

Tripurari Sharan, Nipu Kumar Nath
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引用次数: 5

Abstract

This paper presents a gate-driven, folded-cascode operational transconductance amplifier (FCOTA), operating in strong inversion region. The input core utilizes two complementary PMOS and NMOS input pairs to ensure rail-to-rail input common mode range (ICMR). The cascoded load structure at output port performs the job of current summer and provides enhanced gain due to high output impedance for FCOTA. The proposed OTA has been employed to implement universal biquadratic low-pass, high-pass, band-pass and notch transfer functions, simultaneously available at different nodes of the filter. The proposed FCOTA used dual supply voltage of ± 0.9V and dissipates around 93.6 μW power and provides 80.24 dB open loop gain and gain bandwidth (GBW) of 6.03 MHz. The Cadence VIRTUOSO environment using UMC 0.18 μm CMOS process technology has been used to simulate the proposed circuit.
低功耗,折叠级联码近轨到轨OTA中频信号处理
提出了一种工作在强反转区的门驱动折叠级联运算跨导放大器(FCOTA)。输入铁芯采用两个互补的PMOS和NMOS输入对,以确保轨对轨输入共模范围(ICMR)。输出端口的级联负载结构执行当前夏季的工作,并由于FCOTA的高输出阻抗而提供增强的增益。所提出的OTA已被用于实现通用双二次低通、高通、带通和陷波传递函数,同时在滤波器的不同节点上可用。FCOTA采用±0.9V双电源电压,功耗约93.6 μW,开环增益为80.24 dB,增益带宽(GBW)为6.03 MHz。采用UMC 0.18 μm CMOS工艺技术的Cadence VIRTUOSO环境对所提出的电路进行了仿真。
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