Towards novel format for representation of polymorphic circuits

Abstract

This paper is focused on the introduction of a novel format for representation of complex polymorphic circuits. Core of this newly presented format is based on the exploitation of And-Inverter Graph (AIG) scheme with a number of extensions. Then, synthesis flow can exploit considerable advantages in terms of the capability to handle at ease more extensive circuit structures involving hundreds of gates and employ subsequent optimization techniques resulting in an improved area-efficiency performance. The actual format notation, explanation of its visual features appearance meaning and comparison with selected conventional approaches are presented. Finally, accomplished experimental results and their analysis is provided.