TriKon: A hypervisor aware manycore processor

Rohan Bhalla, Prathmesh Kallurkar, Nitin Gupta, S. Sarangi
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引用次数: 2

Abstract

Virtualization is increasingly being deployed to run applications in a cloud computing environment. Sadly, there are overheads associated with hypervisors that can prohibitively reduce application performance. A major source of the overheads is the destructive interference between the application, OS, and hypervisor in the memory system. We characterize such overheads in this paper, and propose the design of a novel Triangle cache that can effectively mitigate destructive interference across these three classes of workloads. We subsequently, proceed to design the TriKon manycore processor that consists of a set of heterogeneous cores with caches of different sizes, and Triangle caches. To maximize the throughput of the system as a whole, we propose a dynamic scheduling algorithm for scheduling a class of system and CPU intensive applications on the set of heterogeneous cores. The area of the TriKon processor is within 2% of a baseline processor, and with such a system, we could achieve a performance gain of 12% for a suite of benchmarks. Within this suite, the system intensive benchmarks show a performance gain of 20% while the performance of the compute intensive ones remains unaffected. Also, by allocating extra area for cores with sophisticated cache designs, we further improved the performance of the system intensive benchmarks to 30%.
TriKon:一个监控程序感知的多核处理器
越来越多地部署虚拟化来在云计算环境中运行应用程序。遗憾的是,与管理程序相关的开销可能会严重降低应用程序的性能。开销的一个主要来源是内存系统中应用程序、操作系统和管理程序之间的破坏性干扰。我们在本文中描述了这种开销,并提出了一种新型三角形缓存的设计,该缓存可以有效地减轻这三类工作负载之间的破坏性干扰。随后,我们继续设计TriKon多核处理器,该处理器由一组具有不同大小缓存的异构内核和三角形缓存组成。为了使整个系统的吞吐量最大化,我们提出了一种动态调度算法,用于在异构内核集上调度一类系统和CPU密集型应用程序。TriKon处理器的面积在基准处理器的2%以内,使用这样的系统,我们可以在一系列基准测试中实现12%的性能提升。在这个套件中,系统密集型基准测试显示性能提高了20%,而计算密集型基准测试的性能不受影响。此外,通过为具有复杂缓存设计的核心分配额外的区域,我们进一步将系统密集型基准测试的性能提高了30%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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