Comparison of three bandgap topologies implemented in standard CMOS technology with parasitic PNP bipolars

Abstract

This paper presents a comparison between three bandgap topologies that are based exclusively on the parasitic vertical PNP bipolar transistors in the CMOS technologies. An OpAmp-less bandgap, the Kuijk topology and a recently proposed resistorless bandgap reference circuit (BGR) are designed and compared considering noise, quiescent current, area and power supply rejection. A sizing strategy for the resistorless BGR is also provided. The circuits were implemented in a 180nm CMOS process, targeting low noise and low power consumption.