{"title":"A 1.2 V 3.1–10.6 GHz CMOS low noise amplifier with 24 dB gain and 2.4 dB noise figure","authors":"Sun Limei","doi":"10.1109/WCSP.2009.5371445","DOIUrl":null,"url":null,"abstract":"This paper presents a 3.1–10.6 GHz low noise amplifier (LNA) for ultra-wideband (UWB) applications. The proposed wideband amplifier comprises a single-ended resistor feedback LNA with wideband input matching and a single-to-differential voltage buffer which improves the power gain of the amplifier. The LNA achieves a 23.2 dB voltage gain and input return loss below −13 dB from 3.1–10.6 GHz, 2.4 dB and 2.7 dB minimum and maximum noise figure (NF), and −11.9 dBm IIP3 at 6 GHz. The proposed LNA is realized in 0.13 μm CMOS technology and occupies 0.32 mm2 area. The power consumption is 12.2 mW with 1.2 V supply.","PeriodicalId":244652,"journal":{"name":"2009 International Conference on Wireless Communications & Signal Processing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 International Conference on Wireless Communications & Signal Processing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WCSP.2009.5371445","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
This paper presents a 3.1–10.6 GHz low noise amplifier (LNA) for ultra-wideband (UWB) applications. The proposed wideband amplifier comprises a single-ended resistor feedback LNA with wideband input matching and a single-to-differential voltage buffer which improves the power gain of the amplifier. The LNA achieves a 23.2 dB voltage gain and input return loss below −13 dB from 3.1–10.6 GHz, 2.4 dB and 2.7 dB minimum and maximum noise figure (NF), and −11.9 dBm IIP3 at 6 GHz. The proposed LNA is realized in 0.13 μm CMOS technology and occupies 0.32 mm2 area. The power consumption is 12.2 mW with 1.2 V supply.