Responsive Fault-Tolerant Computing in the Era of Terascale Integration State of Art Report

P. Ezhilchelvan
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引用次数: 1

Abstract

Scaling in hardware integration process results in IC-process geometry reductions, lower operating voltages and increased clock speeds. This paper first surveys the reliability obstacles these developments give rise to and then points out that computing systems can no longer be safely assumed to fail only by crashing. Yet this assumption is at the core of primary-backup replication which the literature presents as the appropriate, and hence the most widely used, strategy for time-critical fault-tolerant applications. The paper then observes that building computing nodes with announced crash failure mode is a promising way forward to deal with the emerging reliability challenges. Work carried out to assure such a failure mode has also been briefly surveyed.
Terascale集成时代的响应式容错计算最新技术报告
硬件集成过程中的缩放导致ic工艺几何尺寸减小,工作电压降低,时钟速度提高。本文首先调查了这些发展带来的可靠性障碍,然后指出不能再安全地假设计算系统只会因崩溃而失效。然而,这个假设是主备份复制的核心,文献中认为,对于时间关键型容错应用程序,主备份复制是合适的,因此也是最广泛使用的策略。然后,本文指出,构建具有宣布的崩溃失效模式的计算节点是应对新出现的可靠性挑战的一种有前途的方法。还简要介绍了为确保这种失效模式而进行的工作。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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