A Sub-GHz CMOS Low-IF Receiver for loT Applications

Liying Cai, Xiaopeng Yu, Hanqi Gao, Suhao Chen, Xiong Song, Lingchang Chen, Kai Huang, Dan-dan Zheng
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引用次数: 1

Abstract

A sub-GHz RF receiver with low power consumption and low noise figure (NF) is presented in this paper. It is featured with an improved shunt feedback low noise amplifier (LNA), which obtains a balance among gain, power consumption and noise figure, etc. Moreover, a complex filter with tunable central frequency and bandwidth is proposed in the intermediate frequency (IF) range. It shows a high image rejection rate and a wide range of gain. The receiver, implemented using 0.13-μm CMOS technology, exhibits a noise figure of 4.45 dB, a maximum voltage gain of 85.2 dB and a high image rejection rate of 79.0 dB in measurements. For 1.2V supply voltage, the DC power consumption is 3.4mW/26.6J $\mu \mathbf{W}$ under working and sleep modes respectively.
用于loT应用的Sub-GHz CMOS低中频接收器
提出了一种低功耗、低噪声系数(NF)的sub-GHz射频接收机。它的特点是采用改进的分流反馈低噪声放大器(LNA),在增益、功耗和噪声系数等方面取得平衡。在中频范围内,提出了一种中心频率和带宽可调的复合滤波器。它具有高的图像抑制率和宽的增益范围。该接收机采用0.13 μm CMOS技术实现,噪声系数为4.45 dB,最大电压增益为85.2 dB,图像抑制率高达79.0 dB。电源电压为1.2V时,工作模式和睡眠模式下的直流功耗分别为3.4mW/26.6J $\mu \mathbf{W}$。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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