Rajesh Narayanan, Sai Kotha, G. Lin, Aimal Khan, S. Rizvi, Wajeeha Javed, Hassan Khan, S. A. Khayam
{"title":"Macroflows and Microflows: Enabling Rapid Network Innovation through a Split SDN Data Plane","authors":"Rajesh Narayanan, Sai Kotha, G. Lin, Aimal Khan, S. Rizvi, Wajeeha Javed, Hassan Khan, S. A. Khayam","doi":"10.1109/EWSDN.2012.16","DOIUrl":null,"url":null,"abstract":"In this paper, we empirically quantify inherent limitations of merchant switching silicon, which constrain SDNs' innovation potential. To overcome these limitations, we propose a Split SDN Data Plane (SSDP) architecture -- anew switch architecture which allows rapid network innovation by complementing a cost-effective, yet inflexible, front end merchant silicon switch chip with a deeply programmable co-processor subsystem. We implemented SSDP on a prototype Dell Power Connect platform with a programmable multi-core data plane subsystem. To demonstrate SSDP's potential, we developed diverse real-world cases on the prototype platform. Benchmarking results show that, while delivering on its rapid innovation promise (with significantly shorter turn-around time), a SSDP architecture also provides reasonably high switching rates on deep flow tables.","PeriodicalId":127229,"journal":{"name":"2012 European Workshop on Software Defined Networking","volume":"51 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"44","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 European Workshop on Software Defined Networking","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EWSDN.2012.16","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 44
Abstract
In this paper, we empirically quantify inherent limitations of merchant switching silicon, which constrain SDNs' innovation potential. To overcome these limitations, we propose a Split SDN Data Plane (SSDP) architecture -- anew switch architecture which allows rapid network innovation by complementing a cost-effective, yet inflexible, front end merchant silicon switch chip with a deeply programmable co-processor subsystem. We implemented SSDP on a prototype Dell Power Connect platform with a programmable multi-core data plane subsystem. To demonstrate SSDP's potential, we developed diverse real-world cases on the prototype platform. Benchmarking results show that, while delivering on its rapid innovation promise (with significantly shorter turn-around time), a SSDP architecture also provides reasonably high switching rates on deep flow tables.