Energy efficient addition by two-sided carry-reverse computation

Abstract

This paper shows how addition can be accelerated by considering the carry as being propagating from LSB and from MSB towards a midpoint. A closed form expression for the optimal midpoint is derived. The acceleration is used to reduce the energy consumed by the adder. A 64 bit adder targeting 500MHz clock frequency, designed in 65 nanometers, consumed 18% less energy and area compared to adder generated by state-of-the-art EDA synthesis tool.