Run Time Fault Tolerant Mechanism for Transient and Hardware Faults in ALU for Highly Reliable Embedded Processor

Abstract

Reliability and low power consumption are important design metrics of any critical embedded systems. With the advancements of fabrication technology reaching to the nano levels and complexity of system is increasing, systems are more exposed to manufacturing defects which leads to faults in the system. This paper is presenting a method to design ALU which employs a run time recovery mechanism in order to detect both hardware and transient faults. The proposed method is a recomputing using duplication with comparison (RDWC) based on combination of time and hardware redundancy techniques. Simulation results indicate, RDWC incurs a decrease in LUT overhead of 124%, IO (input output) overhead by 129% and power overhead of 35% compared to the existing TMR technique.