{"title":"Adiabatic Circuits for Quantum Computer Control","authors":"E. Debenedictis","doi":"10.1109/ICRC2020.2020.00004","DOIUrl":null,"url":null,"abstract":"How far can quantum computers scale up? Quantum computers have more qubits with longer lifetimes than ever before, yet experimentalists report a scaling limit around 1,000 qubits due to heat dissipation in the classical control system. This paper introduces new classical circuits and architectures that will reduce this dissipation by exploiting the heat difference between room temperature and the cryogenic environment. In lieu of using just cryo CMOS or Single Flux Quantum (SFQ) Josephson junctions (JJs), this paper focuses on cryogenic adiabatic transistor circuits (CATC), which use the same transistors as CMOS and are clocked on a ladder of clock rates, enabling the circuits to exploit varying energy-delay tradeoffs to increase energy efficiency. These design principles could lead to a scale up path for quantum computers that combines aspects of Moore’s law with the principles of quantum speedup.","PeriodicalId":320580,"journal":{"name":"2020 International Conference on Rebooting Computing (ICRC)","volume":"34 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Conference on Rebooting Computing (ICRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICRC2020.2020.00004","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
How far can quantum computers scale up? Quantum computers have more qubits with longer lifetimes than ever before, yet experimentalists report a scaling limit around 1,000 qubits due to heat dissipation in the classical control system. This paper introduces new classical circuits and architectures that will reduce this dissipation by exploiting the heat difference between room temperature and the cryogenic environment. In lieu of using just cryo CMOS or Single Flux Quantum (SFQ) Josephson junctions (JJs), this paper focuses on cryogenic adiabatic transistor circuits (CATC), which use the same transistors as CMOS and are clocked on a ladder of clock rates, enabling the circuits to exploit varying energy-delay tradeoffs to increase energy efficiency. These design principles could lead to a scale up path for quantum computers that combines aspects of Moore’s law with the principles of quantum speedup.