OC-192 receiver in standard 0.18/spl mu/m CMOS

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) Pub Date : 2002-08-07 DOI:10.1109/ISSCC.2002.992213

Jun Cao, A. Momtaz, K. Vakilian, M.M. Green, D. Chung, K. Jen, M. Caresosa, B. Tan, I. Fujimori, A. Hairapetian

引用次数: 14

Abstract

A fully integrated OC-192 multi-rate (9.95Gb/s-10.71Gb/s) receiver uses standard 0.18/spl mu/m CMOS. The circuit consists of an input amplifier, CDR, 1:16 demux and 18 LVDS drivers. The chip exceeds SONET jitter tolerance spec by >100%. Recovered 10Gb/s clock jitter is <4mUl(rms). The input sensitivity is <50mV with 870mW at 1.8V.

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标准0.18/spl mu/m CMOS OC-192接收器

完全集成的OC-192多速率(9.95Gb/s-10.71 gb /s)接收器使用标准的0.18/spl mu/m CMOS。该电路由一个输入放大器、CDR、1:16 demux和18个LVDS驱动器组成。该芯片超过SONET的抖动容限100%。恢复的10Gb/s时钟抖动小于4mUl(rms)。1.8V时，870mW的输入灵敏度<50mV。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

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