{"title":"Carrier frequency offset estimation and FPGA implementation in OFDM system","authors":"L. Wei, Duan Peng","doi":"10.1109/ICAM.2017.8242186","DOIUrl":null,"url":null,"abstract":"The carrier frequency offset(CFO) in OFDM system is one of the key factors that affect the performance of wireless communication. Based on the analysis of the CFO estimation algorithm, this paper presents FPGA implementation scheme in the problem of OFDM fractional CFO estimation using pilot-based algorithm, including CFO estimation and CFO compensation. The circuit modules in the program were written in Verilog HDL. They are compiled, simulated and integrated under Xilinx programming software Vivado 2014.4. The simulation results show that the circuit module can accurately estimate and compensate the fractional CFO.","PeriodicalId":117801,"journal":{"name":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICAM.2017.8242186","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The carrier frequency offset(CFO) in OFDM system is one of the key factors that affect the performance of wireless communication. Based on the analysis of the CFO estimation algorithm, this paper presents FPGA implementation scheme in the problem of OFDM fractional CFO estimation using pilot-based algorithm, including CFO estimation and CFO compensation. The circuit modules in the program were written in Verilog HDL. They are compiled, simulated and integrated under Xilinx programming software Vivado 2014.4. The simulation results show that the circuit module can accurately estimate and compensate the fractional CFO.