A 72GS/s, 8-bit DAC-based Wireline Transmitter in 4nm FinFET CMOS for 200+Gb/s Serial Links

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) Pub Date : 2022-06-12 DOI:10.1109/vlsitechnologyandcir46769.2022.9830421

T. Dickson, Z. Deniz, M. Cochet, M. Kossel, T. Morf, Young-Ho Choi, P. Francese, M. Brändli, T. Beukema, C. Baks, J. Proesel, J. Bulzacchelli, Michael P. Beakes, Byoung-Joo Yoo, Hyoungbae Ahn, Dong-Hyuk Lim, Gunil Kang, Sang-Hune Park, M. Meghelli, Hyo-Gyuem Rhew, D. Friedman, Michael Choi, M. Soyuer, Jongshin Shin

引用次数: 3

Abstract

A DAC-based SST transmitter for wireline applications is reported in a 4nm FinFET technology. 8b resolution and high analog output bandwidth (BW) are achieved by employing a segmented architecture along with a single-ended LSB. Hybrid analog/digital tuning is used in the DAC LSB segments, resulting in well-matched MSB/LSB segments with -0.63/0.67 LSB INL and -0.16/0.43 LSB DNL. 216Gb/s PAM8 and 212Gb/s QAM64 OFDM operation are demonstrated at 288mW from a 0.95V supply.

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72GS/s, 8位基于dac的有线发射机，4nm FinFET CMOS，用于200+Gb/s串行链路

报道了一种用于有线应用的基于dac的SST发射机，采用4nm FinFET技术。通过采用分段架构和单端LSB实现8b分辨率和高模拟输出带宽(BW)。在DAC LSB段中使用混合模拟/数字调谐，从而产生具有-0.63/0.67 LSB INL和-0.16/0.43 LSB DNL的良好匹配的MSB/LSB段。216Gb/s PAM8和212Gb/s QAM64 OFDM在0.95V电源下在288mW下运行。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

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