Ultra-low power CMOS multiple voltage reference with 3.9 ppm/°C temperature coefficient

Yongquan Li, Mei Jiang
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Abstract

A voltage reference with low temperature coefficient (TC), multipliable outputs and low power consumption is presented in this paper. The proposed reference circuit operating with all transistors biased in the subthreshold region, provides reference voltage of 342 mV. The outputs also can be multipliable to two or three, such as 684 and 1025 mV which is dependence on the requirement of system and the supply voltage. Subthreshold MOSFET design allows the circuit to work on a supply voltage as low as 0.8 V with an average current consumption of 6.4 nA at room temperature. The power supply rejection ratio (PSRR) with a 500f F capacitor load of 342 mV output voltage simulated at 100 Hz and 10 MHz is over than 51.9 dB and 42.2 dB, respectively. Monte Carlo simulation shows a mean TC is 3.9 ppm/°C over a set of 500 samples, in a temperature range from -30 °C to 100 °C. The layout area of the presented voltage reference is 0.0015 mm2.
超低功耗CMOS多重电压基准,3.9 ppm/°C温度系数
本文提出了一种具有低温系数、输出可复用和低功耗的基准电压。所提出的基准电路在所有晶体管偏置于亚阈值区域的情况下工作,提供342 mV的参考电压。根据系统的要求和电源电压的不同,输出也可以增加到两个或三个,如684和1025 mV。亚阈值MOSFET设计允许电路在低至0.8 V的电源电压下工作,在室温下平均电流消耗为6.4 nA。在100hz和10mhz下,500f F电容负载342 mV输出电压时,电源抑制比(PSRR)分别大于51.9 dB和42.2 dB。蒙特卡罗模拟显示,在一组500个样品中,温度范围为-30°C至100°C,平均TC为3.9 ppm/°C。给出的电压基准的布局面积为0.0015 mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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