Y. Hara, T. Kaneko, Y. Obata, A. Shimoda, H. Yamaguchi, T. Sugimoto, J. Saito, N. Iijima, Y. Uera, T. Fujisaka, M. Kondo, M. Mizuno
{"title":"A new multi-beam radar signal processor","authors":"Y. Hara, T. Kaneko, Y. Obata, A. Shimoda, H. Yamaguchi, T. Sugimoto, J. Saito, N. Iijima, Y. Uera, T. Fujisaka, M. Kondo, M. Mizuno","doi":"10.1109/RADAR.1995.522546","DOIUrl":null,"url":null,"abstract":"The paper describes an overview of a novel signal processor for multi-beam radars. The processor has been developed for a digital beam forming radar system, which has a capability of generating 6 beams at the same time. The processor consists of a digital phase sensitive detector, a digital beam former, and a multi-beam signal processor, and processes the multi-channel data from the antenna. The architecture and the features of the processors are first presented, and the evaluation results of an experimental model of the processors are shown.","PeriodicalId":326587,"journal":{"name":"Proceedings International Radar Conference","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-05-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings International Radar Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RADAR.1995.522546","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
The paper describes an overview of a novel signal processor for multi-beam radars. The processor has been developed for a digital beam forming radar system, which has a capability of generating 6 beams at the same time. The processor consists of a digital phase sensitive detector, a digital beam former, and a multi-beam signal processor, and processes the multi-channel data from the antenna. The architecture and the features of the processors are first presented, and the evaluation results of an experimental model of the processors are shown.