{"title":"A Simultaneous Multiband Continuous-Time ΔΣ ADC With 90-MHz Aggregate Bandwidth in 40-nm CMOS","authors":"John Bell, M. Flynn","doi":"10.1109/ESSCIRC.2019.8902880","DOIUrl":null,"url":null,"abstract":"This letter presents a new class of ΔΣ modulator that combines any set of traditional NTF shapes in a single modulator. The prototype multiband ΔΣ modulator (MB-ΔΣM) demonstrates two simultaneous bands—one baseband and one bandpass. These two bands are separated by 500 MHz, have an aggregate bandwidth of 90 MHz, with up to 55-dB measured SNDR. In addition to reducing the number of ADCs, this new approach promises further system-level power savings by simplifying the RF frontend. The system-level power savings from requiring fewer analog mixers, LNAs, filters, and ADC drivers can be even more than the ADC power reduction.","PeriodicalId":402948,"journal":{"name":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2019.8902880","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
This letter presents a new class of ΔΣ modulator that combines any set of traditional NTF shapes in a single modulator. The prototype multiband ΔΣ modulator (MB-ΔΣM) demonstrates two simultaneous bands—one baseband and one bandpass. These two bands are separated by 500 MHz, have an aggregate bandwidth of 90 MHz, with up to 55-dB measured SNDR. In addition to reducing the number of ADCs, this new approach promises further system-level power savings by simplifying the RF frontend. The system-level power savings from requiring fewer analog mixers, LNAs, filters, and ADC drivers can be even more than the ADC power reduction.