Exploiting DRAM bank mapping and HugePages for effective denial-of-service attacks on shared cache in multicore

Abstract

In this paper, we propose memory-aware cache DoS attacks that can induce more effective cache blocking by taking advantage of information of the underlying memory hardware. Like prior cache DoS attacks, our new attacks also generate lots of cache misses to exhaust cache internal shared hardware resources. The difference is that we carefully control those cache misses to target the same DRAM bank to induce bank conflicts. Note that accesses to different DRAM banks can occur in parallel, and are thus faster. However, accesses to the same bank are serialized, and thus slower [5] and as each memory access request takes longer to finish, it would prolong the time it takes for the cache to become unblocked. We further extend these attacks to exploit HugePage support in Linux in order to directly control physical address bits and to avoid TLB contention, while mounting the attacks from the userspace.