A Fully differential D-band CMOS Amplifier in 65nm bulk CMOS

Abstract

This paper presents a 140GHz D-band fully differential three-stage amplifier in 65-nm CMOS. The circuit uses a common source (CS) and utilizes cross-capacitance neutralization technology to form feedback and circuit matching is base on transformer matching. The simulation result show that amplifier achieves a maximum gain of 17.2 dB at 127GHz and the 3dB bandwidth is 38GHz from 121GHz from 159GHz, the saturated output power is 7.2dBm and the simulated 1-dB compression power is 2.8dBm at 140GHz. The core of amplifier occupies an area of 0.09mm2. The power consumption is 56mW from a 1.2 V supply voltage.