K. Eguchi, S. Pongswatd, T. Thepmanee, K. Fujimoto, H. Sasaki
{"title":"Power saving techniques to improve efficiency of a parallel-connected negative DC-DC converter","authors":"K. Eguchi, S. Pongswatd, T. Thepmanee, K. Fujimoto, H. Sasaki","doi":"10.1109/ECTICON.2013.6559515","DOIUrl":null,"url":null,"abstract":"A parallel-connected negative DC-DC converter using power saving techniques has been proposed in this paper. Unlike conventional negative converters, the proposed converter consists of four negative heap converters connected in parallel, where the power switch is driven by non-overlapped four-phase pulses cyclically. In two of the four negative heap converters, a part of the electric charge in parasitic capacitances is reused in each clock cycle. For this reason, the proposed converter can reduce energy loss than the conventional converters. The validity of the proposed technique was confirmed by simulation program with integrated circuit emphasis (SPICE) simulations and theoretical analysis. When the output load is 1 kΩ, the proposed converter was able to improve power efficiency more than 11% compared to the conventional converter.","PeriodicalId":273802,"journal":{"name":"2013 10th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 10th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTICON.2013.6559515","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A parallel-connected negative DC-DC converter using power saving techniques has been proposed in this paper. Unlike conventional negative converters, the proposed converter consists of four negative heap converters connected in parallel, where the power switch is driven by non-overlapped four-phase pulses cyclically. In two of the four negative heap converters, a part of the electric charge in parasitic capacitances is reused in each clock cycle. For this reason, the proposed converter can reduce energy loss than the conventional converters. The validity of the proposed technique was confirmed by simulation program with integrated circuit emphasis (SPICE) simulations and theoretical analysis. When the output load is 1 kΩ, the proposed converter was able to improve power efficiency more than 11% compared to the conventional converter.