Limitations to fully-depleted SOI structures

Abstract

The authors demonstrate the mobility and threshold voltage behavior for fully depleted transistors of various geometries on various epitaxial silicon thicknesses. Electrical characterization techniques were used to examine fully depleted SIMOX SOI front- and back-gate transistors of gate geometries between 0.6 and 3 mu m on epitaxial silicon of thicknesses between 150 and 300 nm. Degradation in N-channel mobilities and threshold voltages was observed for short channel lengths and decreasing epitaxial silicon thickness. The decrease in mobility was attributed to the higher electric fields for small geometries. SOI is better than bulk, and fully depleted SOI is better than non-fully depleted SOI. Ultra thin SOI, synonymous with fully depleted, uses narrow gates, and thus the problem of degradation in mobility will be observed. Fully depleted SOI mitigates but does not remove the field dependence of mobility.<>