{"title":"Energy-aware dynamic reconfiguration of communication-centric applications for reliable MPSoCs","authors":"Anup Das, Ashutosh Kumar Singh, Akash Kumar","doi":"10.1109/ReCoSoC.2013.6581540","DOIUrl":null,"url":null,"abstract":"To accommodate the ever increasing demands of applications and for the ease of scalability, multiprocessor systems-on-chip (MPSoCs) are becoming a popular design choice in current and future technologies with streaming multimedia and other communication-centric applications constituting a large fraction of the application space. Mapping and scheduling of these applications on an MPSoC to minimize energy consumption while guaranteeing to satisfy the performance requirement is an NP-hard problem. This is coupled with the run-time variability associated with MPSoC resource availability due to the occurrence of faults. The existing studies on fault-tolerance and energy minimization are either based on static (offline) analysis which fails to capture application dynamism or do not consider throughput degradation. This paper proposes an execution trace-based run-time technique to reconfigure application mapping to minimize communication energy of an application, simultaneously dealing with the occurrence of transient, intermittent and permanent faults. Experiments conducted with synthetic and real-life applications modeled using Synchronous Data Flow Graphs (SDFGs) demonstrate that the proposed technique achieves significant improvement with respect to the state-of-the-art approaches in terms of throughput and storage overhead with less than 10% energy overhead.","PeriodicalId":354964,"journal":{"name":"2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ReCoSoC.2013.6581540","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17
Abstract
To accommodate the ever increasing demands of applications and for the ease of scalability, multiprocessor systems-on-chip (MPSoCs) are becoming a popular design choice in current and future technologies with streaming multimedia and other communication-centric applications constituting a large fraction of the application space. Mapping and scheduling of these applications on an MPSoC to minimize energy consumption while guaranteeing to satisfy the performance requirement is an NP-hard problem. This is coupled with the run-time variability associated with MPSoC resource availability due to the occurrence of faults. The existing studies on fault-tolerance and energy minimization are either based on static (offline) analysis which fails to capture application dynamism or do not consider throughput degradation. This paper proposes an execution trace-based run-time technique to reconfigure application mapping to minimize communication energy of an application, simultaneously dealing with the occurrence of transient, intermittent and permanent faults. Experiments conducted with synthetic and real-life applications modeled using Synchronous Data Flow Graphs (SDFGs) demonstrate that the proposed technique achieves significant improvement with respect to the state-of-the-art approaches in terms of throughput and storage overhead with less than 10% energy overhead.