Application of via post interconnection for build up printed circuit board

2nd 1998 IEMT/IMC Symposium (IEEE Cat. No.98EX225) Pub Date : 1998-04-15 DOI:10.1109/IEMTIM.1998.704666

T. Kobayashi, S. Itaya, K. Ikeda, J. Kawasaki, H. Honma

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Abstract

Recently, printed circuit boards (PCBs) have been downsized and electronic circuits have become more dense, because of the tendency for electronic component miniaturization. With the shrinkage of PCBs, the build up process has become an important production technique in PCB preparation. For the build up technique, each of the electric circuit layers is electrically connected with via holes. The via holes are metallized by means of electroless plating and electroplating of copper. In the electroless plating process with miniaturization of via hole diameter, if the via hole deposition uniformity is decreased, the electrical reliability between the layers significantly deteriorates. Accordingly, the authors investigated build up printed circuit boards using via posts, which are metallized using the Cu electroplating method. The shear strength between electroplated via posts and electrolessly plated underlayers was evaluated. It was found that electroplated via posts with higher shear strength are obtained by optimization of the pretreatment process and electroplating conditions. In particular, it was important that oxide films on the copper underlayer were removed for improved shear strength.

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通过后互连在装配式印刷电路板中的应用

近年来，由于电子元件小型化的趋势，印刷电路板(pcb)已经小型化，电子电路也变得更加密集。随着PCB的收缩，积层工艺已成为PCB制备中的一项重要生产技术。对于构建技术，每个电路层都是通过孔电连接的。通过化学镀和镀铜的方法对通孔进行金属化处理。在孔直径小型化的化学镀过程中，如果孔沉积均匀性降低，层与层之间的电可靠性将显著下降。因此，作者研究了用铜电镀方法将导孔柱金属化的印刷电路板。评价了电镀孔桩与化学镀底层的抗剪强度。通过对预处理工艺和电镀条件的优化，得到了具有较高抗剪强度的孔桩电镀。特别重要的是，去除铜底层的氧化膜以提高抗剪强度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2nd 1998 IEMT/IMC Symposium (IEEE Cat. No.98EX225)

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