{"title":"The dual gate EST: a new MOS-gated thyristor structure","authors":"S. Sawant, S. Sridhar, B. J. Baliga","doi":"10.1109/ISPSD.1996.509463","DOIUrl":null,"url":null,"abstract":"In this paper, the characteristics of a new MOS-gated thyristor-the Dual Gate Emitter Switched Thyristor (DG-EST)-are presented. The DG-EST consists of a Dual Channel Emitter Switched Thyristor (DC-EST) section and a Conventional Emitter Switched Thyristor (C-EST) section with a common main thyristor region that can be controlled using two independent gate electrodes. This device has a lower on-state voltage drop than the C-EST and at the same time possesses the high voltage current saturation feature of the DC-EST. The DG-EST has been found to exhibit a much higher parasitic thyristor latch-up current density than the C-EST and the DC-EST structures and has a superior trade-off curve between on-state voltage drop and turn-off time when compared to the C-EST structure.","PeriodicalId":377997,"journal":{"name":"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"8th International Symposium on Power Semiconductor Devices and ICs. ISPSD '96. Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1996.509463","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In this paper, the characteristics of a new MOS-gated thyristor-the Dual Gate Emitter Switched Thyristor (DG-EST)-are presented. The DG-EST consists of a Dual Channel Emitter Switched Thyristor (DC-EST) section and a Conventional Emitter Switched Thyristor (C-EST) section with a common main thyristor region that can be controlled using two independent gate electrodes. This device has a lower on-state voltage drop than the C-EST and at the same time possesses the high voltage current saturation feature of the DC-EST. The DG-EST has been found to exhibit a much higher parasitic thyristor latch-up current density than the C-EST and the DC-EST structures and has a superior trade-off curve between on-state voltage drop and turn-off time when compared to the C-EST structure.