The dual gate EST: a new MOS-gated thyristor structure

S. Sawant, S. Sridhar, B. J. Baliga
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引用次数: 4

Abstract

In this paper, the characteristics of a new MOS-gated thyristor-the Dual Gate Emitter Switched Thyristor (DG-EST)-are presented. The DG-EST consists of a Dual Channel Emitter Switched Thyristor (DC-EST) section and a Conventional Emitter Switched Thyristor (C-EST) section with a common main thyristor region that can be controlled using two independent gate electrodes. This device has a lower on-state voltage drop than the C-EST and at the same time possesses the high voltage current saturation feature of the DC-EST. The DG-EST has been found to exhibit a much higher parasitic thyristor latch-up current density than the C-EST and the DC-EST structures and has a superior trade-off curve between on-state voltage drop and turn-off time when compared to the C-EST structure.
双栅EST:一种新型mos门控晶闸管结构
本文介绍了一种新型mos门控晶闸管——双栅发射极开关晶闸管(DG-EST)的特性。DG-EST由双通道发射极开关晶闸管(DC-EST)部分和传统发射极开关晶闸管(C-EST)部分组成,该部分具有可使用两个独立栅极控制的公共主晶闸管区域。该器件具有比直流est更低的导通压降,同时具有直流est的高电压电流饱和特性。与C-EST和DC-EST结构相比,DG-EST结构具有更高的寄生晶闸管锁存电流密度,并且与C-EST结构相比,DG-EST结构在导通电压降和关断时间之间具有更好的权衡曲线。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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