Memory Analysis of Low Power MPEG-4 Decoder Architecture

Abstract

Recent research has shown that in mobile devices, energy efficiency of the total system does not scale at the same pace with the energy efficiency of the silicon. The reason has been attributed to overheads in software, and in the context of multi-media codecs a new approach has been proposed. In this approach hardware accelerators are scheduled quasi-statically thus decreasing the interfacing overhead substantially. The validation of the approach has been done by restructuring the open-source Xvid codec software implementation. In this paper we analyze the approach for its memory requirements, and propose some optimizations that will substantially decrease the memory bandwidth of the approach.