A multilevel eigenvalue based circuit partitioning technique

Abstract

VLSI circuit partitioning is an important step in the physical design of integrated circuits. In VLSI partitioning, a circuit is partitioned into smaller relatively independent sub-circuits. In this paper we present an eigenvalue based multilevel partitioning algorithm. The proposed method uses a matrix reordering technique to produce a minimal bandwidth matrix, relying upon matrix sparsity. The reordering technique is applied to the connectivity matrix of a clustered circuit and the matrix connectivity information is obtained. This connectivity information is used to partition the circuit. The experimental results demonstrate the technique's effectiveness against flat partitioning algorithms.