Implementation of High Performance 4-Bit ALU using Dual Mode Pass Transistor Logic

Abstract

In this paper, we present a four bit arithmetic logic unit which is energy efficient and temperature invariant implemented using the dual mode pass transistor logic. The basic logic gates such as NOR and NAND are designed using both CMOS logic and dual mode pass transistor logic and are used in the proposed design. Simulations performed demonstrated that DMPL can reduce the computed worst case delay by 42.39%and 39.13%for NOR and NAND gates respectively in dynamic mode and average power dissipation by 67.96%and 24.09%for NOR and NAND gates respectively in static mode. In the implemented Arithmetic and Logic Unit, we observe a reduction in worst case delay and average power dissipation by 62.67%and 28.28%. The proposed logic was implemented in 90nm bulk technology using Cadence® Virtuoso® Schematic Editor.