{"title":"10dB planar directional coupler on FR4 substrate for automatic gain control","authors":"A. Setiawan, Taufiqqurrachman, Y. N. Wijayanto","doi":"10.1109/TSSA.2015.7440426","DOIUrl":null,"url":null,"abstract":"This paper presents 10dB planar directional coupler on FR4 substrate for Automatic Gain Control (AGC) system. The proposed design uses single section coupled line method that simulated using simulation software ADS 2011.10 and fabricated on FR4 substrate. The proposed design exhibits a return loss of -22dB, isolation of -26dB, a coupling level accuracy of 9.4dB and insertion loss of -0.7dB at 600MHz. The proposed design can be applied to translate the maximum Variable Gain Amplifier (VGA) output power level to a value lower than the highest detectable log detector power level in AGC system.","PeriodicalId":428512,"journal":{"name":"2015 9th International Conference on Telecommunication Systems Services and Applications (TSSA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 9th International Conference on Telecommunication Systems Services and Applications (TSSA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TSSA.2015.7440426","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents 10dB planar directional coupler on FR4 substrate for Automatic Gain Control (AGC) system. The proposed design uses single section coupled line method that simulated using simulation software ADS 2011.10 and fabricated on FR4 substrate. The proposed design exhibits a return loss of -22dB, isolation of -26dB, a coupling level accuracy of 9.4dB and insertion loss of -0.7dB at 600MHz. The proposed design can be applied to translate the maximum Variable Gain Amplifier (VGA) output power level to a value lower than the highest detectable log detector power level in AGC system.