{"title":"Voltage Balancing of a New Five-Level Multilevel Inverter with a Modified Carrier Pulse Width Modulation Scheme","authors":"Mohane Selvaraj, A. Dekka, D. Ronanki, A. R. Beig","doi":"10.1109/APEC43580.2023.10131230","DOIUrl":null,"url":null,"abstract":"The advanced multilevel inverters are designed with floating capacitors to increase their output voltage levels. For a reliable operation, these inverters require an efficient voltage balancing algorithm to control the voltage of floating capacitors at rated values. Typically, the balancing algorithm uses redundancy states and is implemented with the conventional multi-carrier pulse width modulation schemes. However, the inverter structure and load power factor affect the balancing ability of the conventional methods. In this article, the balancing algorithm based on a modified multi-carrier based modulation technique is proposed for a new five-level multilevel inverter. In the proposed modified approach, the carriers are distributed non-uniformly throughout the carrier space leading to an output voltage with overlapped voltage steps. With this philosophy, the redundancy states can be utilized effectively in achieving the balancing of floating capacitor voltages under a wide range of power factors. Also, the floating capacitor voltage ripples are minimized compared with the conventional methods. The performance comparison of the proposed and conventional methodologies at different load power factors are presented using the simulation tools.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC43580.2023.10131230","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The advanced multilevel inverters are designed with floating capacitors to increase their output voltage levels. For a reliable operation, these inverters require an efficient voltage balancing algorithm to control the voltage of floating capacitors at rated values. Typically, the balancing algorithm uses redundancy states and is implemented with the conventional multi-carrier pulse width modulation schemes. However, the inverter structure and load power factor affect the balancing ability of the conventional methods. In this article, the balancing algorithm based on a modified multi-carrier based modulation technique is proposed for a new five-level multilevel inverter. In the proposed modified approach, the carriers are distributed non-uniformly throughout the carrier space leading to an output voltage with overlapped voltage steps. With this philosophy, the redundancy states can be utilized effectively in achieving the balancing of floating capacitor voltages under a wide range of power factors. Also, the floating capacitor voltage ripples are minimized compared with the conventional methods. The performance comparison of the proposed and conventional methodologies at different load power factors are presented using the simulation tools.