Energy-Saving Mechanisms in the Time-Triggered Architecture

Abstract

Energy consumption is a major issue in the design of embedded systems that are battery-driven. At the architectural level energy savings can be realized by a diversity of mechanisms. This paper presents the energy-savings mechanisms that are part of the time-triggered architecture (TTA). The paper starts with a general section on energy dissipation in VSLI circuits and an outline of the architectural style of the time-triggered architecture as far as it is relevant for energy efficiency. In the following three Sections we elaborate on the TTA energy-savings mechanisms at the system level, the component level, and of the communication system.