Demonstration of a 0.325-THz CMOS amplifier

D. Parveg, D. Karaca, M. Varonen, A. Vahdati, K. Halonen
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引用次数: 12

Abstract

This paper presents a 0.325-THz single-ended amplifier designed in a 28-nm FDSOI CMOS technology. The amplifier consists of four common-source gain stages and utilizes staggered-tuning along with inductive feedback (drain to gate) technique to boost up the gain over a wide frequency band. Having a total power consumption of 28 mW, the amplifier achieves a peak gain of 4.5 dB at 325 GHz. To the best of authors' knowledge, this is the highest operation frequency demonstrated for a silicon amplifier up to date.
一个0.325 thz CMOS放大器的演示
本文提出了一种采用28纳米FDSOI CMOS技术设计的0.325 thz单端放大器。该放大器由四个共源增益级组成,并利用交错调谐以及电感反馈(漏极到门)技术来提高宽频带上的增益。该放大器的总功耗为28 mW,在325 GHz时峰值增益为4.5 dB。据作者所知,这是迄今为止硅放大器的最高工作频率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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