Design and implementation for 125 mW/MIPS ultra-high speed low power asymmetric digital subscriber line transceiver chip

Seong-Jo Na, M.M.-O. Lee, Ting-Hong Chung, Seung-Min Lee, J.H. Kim
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Abstract

Multimedia service with audio and video have become most desirable as the ADSL technology ideally converted from 1.5 Mbps full duplex HDSL technology via two twist-pair into 6.144 Mbps transmission technology via single twist-pair. This results in an interactive transmission service of T1 & E1 class data using the subscriber line without repeaters. The ADSL transceiver chipset is configured by DMT (Discrete Multi Tone modulation) scheme and RISC-based DSP core structure. Our ADSL chip is to be used in VOD, interactive interact service and/or teleconferencing system, etc. The operating frequency and dissipated power of the chip are 40 MHz and 5 W at 5 V.
125 mW/MIPS超高速低功耗非对称数字用户线路收发芯片的设计与实现
随着ADSL技术从通过双绞线的1.5 Mbps全双工HDSL技术理想地转换为通过单绞线的6.144 Mbps传输技术,具有音频和视频的多媒体业务已成为最理想的。这就产生了使用用户线路的T1和E1级数据的交互式传输服务,而无需中继器。ADSL收发器芯片组采用离散多音调制(DMT)方案和基于risc的DSP核心结构。我们的ADSL芯片适用于视频点播、交互式交互服务和/或电话会议系统等。芯片工作频率为40mhz,功耗为5w,电压为5v。
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