Substrate and Ground Noise Interactions in Mixed-Signal Circuits

Abstract

The interaction of the substrate with the inductive on-chip ground distribution network is analyzed in this paper. A transistor level approach is presented to illustrate the effects of the substrate on ground noise. The substrate can have a significant effect on ground noise due to the inductance of the ground lines. For a CMOS inverter, the substrate can reduce negative peak ground noise by 49% during the high-to-low output transition. The substrate, however, increases the positive peak ground noise by 72% during the low-to-high output transition. The effect of the substrate should therefore not be neglected if the inductance of the on-chip ground distribution network is non-negligible. Furthermore, conventional triangle or trapezoid type current demand estimations of the nonlinear circuits are shown to be significantly inaccurate if the ground lines exhibit inductive behavior.