Coarse reconfigurable multimedia unit extension

Abstract

In this paper we introduce a coarse reconfigurable multimedia functional unit (rMFU) extension to a superscalar general-purpose processor (GPP) and a set of specialized multimedia instructions to extend the GPPs instruction set. Two multimedia operations, the DCT operation and the Huffman encoding operation, were chosen to assess the expected performance of our proposal. The performance of the extended processor including the rMFU was evaluated by utilizing modified versions of the ijpeg and mpeg2enc benchmarks and a cycle accurate simulator. Our experiments suggest that the usage of the rMFU in an out-of-order superscalar processor (without increasing the cycle time) is able to decrease the total number of execution cycles by a value between 12.40% and 23.72% when compared to the same processor without such an unit. Moreover, the number of executed instructions are reduced by between 13.67% and 23.61% and the executed branches by between 9.83% and 15.98%.