{"title":"Dynamic Thread Mapping for Maximizing Performance in Power-Efficient Multi-core Systems","authors":"Veronia Iskandar, Cherif R. Salama, M. Taher","doi":"10.1109/ICCES.2018.8639212","DOIUrl":null,"url":null,"abstract":"Efficiently mapping threads to system cores is critical for achieving high performance and power efficiency in multicore systems. Conventional scheduling techniques do not take system heterogeneity and varying DVFS states into account and therefore do not produce efficient mappings. Additionally, since thread behavior varies throughout its execution, a fixed thread-to-core mapping is suboptimal. Dynamically scheduling threads to appropriate core states can significantly improve system throughput and decrease energy consumption. Scheduling decisions are of utmost importance in systems that aim to maximize performance. The problem of thread assignment in order to meet performance or power constraints has been shown to be NP-complete and therefore exceedingly expensive to solve online. This paper proposes a heuristic for dynamically assigning threads to system cores such that performance is maximized while minimizing the energy consumed. The heuristic can be applied to heterogeneous systems and homogeneous systems with DVFS capabilities. Simulation results show that the heuristic can be used online in hundred-core systems, with runtime overhead of less than 1 millisecond in worst cases for 256-core systems.","PeriodicalId":113848,"journal":{"name":"2018 13th International Conference on Computer Engineering and Systems (ICCES)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 13th International Conference on Computer Engineering and Systems (ICCES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCES.2018.8639212","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
Efficiently mapping threads to system cores is critical for achieving high performance and power efficiency in multicore systems. Conventional scheduling techniques do not take system heterogeneity and varying DVFS states into account and therefore do not produce efficient mappings. Additionally, since thread behavior varies throughout its execution, a fixed thread-to-core mapping is suboptimal. Dynamically scheduling threads to appropriate core states can significantly improve system throughput and decrease energy consumption. Scheduling decisions are of utmost importance in systems that aim to maximize performance. The problem of thread assignment in order to meet performance or power constraints has been shown to be NP-complete and therefore exceedingly expensive to solve online. This paper proposes a heuristic for dynamically assigning threads to system cores such that performance is maximized while minimizing the energy consumed. The heuristic can be applied to heterogeneous systems and homogeneous systems with DVFS capabilities. Simulation results show that the heuristic can be used online in hundred-core systems, with runtime overhead of less than 1 millisecond in worst cases for 256-core systems.