Enhanced DSP core for embedded applications

1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461) Pub Date : 1999-10-20 DOI:10.1109/SIPS.1999.822332

J. Takala, M. Kuulusa, P. Ojala, J. Nurmi

引用次数: 2

Abstract

This paper describes a set of enhancements that were implemented to a 16-bit DSP core. The added features include several instructions, extended program/data address spaces, vectored interrupts, and improved low-power operation. Embedded system development flow was reinforced with an optimizing C-compiler and a compact real-time operating system.

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增强的DSP核心用于嵌入式应用

本文描述了一组在16位DSP核心上实现的增强功能。新增的功能包括几个指令、扩展的程序/数据地址空间、矢量中断和改进的低功耗操作。嵌入式系统开发流程通过优化的c编译器和紧凑的实时操作系统得到加强。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

1999 IEEE Workshop on Signal Processing Systems. SiPS 99. Design and Implementation (Cat. No.99TH8461)

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