An 18-mW two-stage CMOS transimpedance amplifier for 10 Gb/s optical application

Abstract

This paper presents a low power and wideband transimpedancc amplifier (TIA) design for 10 Gb/s optical receiver. Using a 0.18-mum CMOS technology, this TIA adopts a two-stage topology with inductive shunt-peaking and series-peaking techniques to optimize the power consumption and bandwidth performance. The measured -3-dB bandwidth is 8.6 GHz in the presence of a 0.15-pF photodiode capacitance. The transimpedance gain is 59 dB Omega with only 18 mW power consumption from a 1.8-V supply. The measured input referred noise current is less than 25 pA / V Hz up to 9 GHz.