Fully Integrated Ultra-Wideband Differential Circulator Based on Sequentially Switched Delay Line in 28-nm FDSOI CMOS

Abstract

In this paper, a non-magnetic circulator, which realizes non-reciprocal signal flows by sequentially switching delay lines, is presented in 28-nm fully depleted silicon-on-insulator (FDSOI) CMOS process. The proposed circulator is designed differentially to increase power handling capability and bandwidth. The bandwidth of insertion loss and isolation can be extended by latticely coupled inductors used in the differential synthetic delay lines. The characteristic impedance of the delay lines is determined by considering the channel resistance of CMOS transistor. The measured insertion losses of transmitter (TX) to antenna (ANT) and ANT to receiver (RX) are 2.5 dB and 2.6 dB, respectively. TX to RX isolation is $> 20\ \text{dB}$ up to 7 GHz. The measured TX input power 1 dB compression point is 4.7 dBm at 3.5 GHz. The chip size of the differential circulator is $1.33\times 0.72\ \text{mm}^{2}$, which is as small as a single ended version, thanks to the coupled inductors.