{"title":"Superimposed Quadratic Buck Converter for High-Efficiency Direct 48V/1V Applications","authors":"Jin Woong Kwak, D. Ma","doi":"10.1109/APEC43580.2023.10131201","DOIUrl":null,"url":null,"abstract":"In the search for high-density and high-efficiency large step-down DC-DC power converters, numerous hybrid converter topologies are reported recently, in which distinct power stages are merged in series to achieve a high step-down voltage conversion ratio. However, these topologies face immediate performance challenges due to the method of series topology combination, which not only increases power device count but also requires well-orchestrated timing control between these devices. To overcome such challenges, this paper presents a new quadratic step-down converter using an unorthodox method of topology superimposition. The resulting superimposed quadratic buck (SQB) converter requires the lowest power device count compared to prior arts. Thanks to the quadratic conversion ratio, the ON-time of the converter is substantially relaxed. It delivers power in parallel paths with minimized RMS current for high efficiency. Meanwhile, the output voltage ripples are largely reduced owing to the inherent inductor current ripple cancellation and the proposed inductor sizing scheme. An experimental prototype of this design achieves direct 48V-to-1V power conversion with a maximum load of 20A and a peak efficiency of 94.5%.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC43580.2023.10131201","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
In the search for high-density and high-efficiency large step-down DC-DC power converters, numerous hybrid converter topologies are reported recently, in which distinct power stages are merged in series to achieve a high step-down voltage conversion ratio. However, these topologies face immediate performance challenges due to the method of series topology combination, which not only increases power device count but also requires well-orchestrated timing control between these devices. To overcome such challenges, this paper presents a new quadratic step-down converter using an unorthodox method of topology superimposition. The resulting superimposed quadratic buck (SQB) converter requires the lowest power device count compared to prior arts. Thanks to the quadratic conversion ratio, the ON-time of the converter is substantially relaxed. It delivers power in parallel paths with minimized RMS current for high efficiency. Meanwhile, the output voltage ripples are largely reduced owing to the inherent inductor current ripple cancellation and the proposed inductor sizing scheme. An experimental prototype of this design achieves direct 48V-to-1V power conversion with a maximum load of 20A and a peak efficiency of 94.5%.