Multifunction generator using Horner scheme and small tables

H. Bessalah, N. Anane, M. Anane
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引用次数: 2

Abstract

This paper deals with the computation of some elementary functions using piecewise Minimax approximation and small tables. The strength of the method is that the same scheme is used to compute all the elementary functions with similar delay and accuracy of lulp (unit in last place). The hardware implementation of this method requires one multiplier and one adder chosen among those available in the Virtex-II FPGA as they present the highest performances concerning the delay and the area. The method has been implemented in a recursive structure which operates at a frequency of over than 25 Mhz.
多功能生成器使用霍纳方案和小表格
本文讨论了用分段极大极小逼近和小表格计算初等函数的问题。该方法的优点是采用相同的方案来计算所有初等函数,具有与lulp(最后一个单元)相似的延迟和精度。该方法的硬件实现需要在Virtex-II FPGA中选择一个乘法器和一个加法器,因为它们在延迟和面积方面表现出最高的性能。该方法已在工作频率超过25 Mhz的递归结构中实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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