Time parameterized function method: a new method for hardware verification with the Boyer-Moore Theorem Prover

Abstract

We propose a new method for hardware verification using the Boyer-Moore Theorem Prover. In this method, each signal of a sequential circuit is represented not as a waveform, but as a time parameterized function. A user simply describes the logical connection of the components of a circuit, and the separated form is mechanically derived. We formalize the method and show that the method not only realizes an efficient proof but is also useful for debugging.