Spidergon: a novel on-chip communication network

M. Coppola, R. Locatelli, G. Maruccia, L. Pieralisi, A. Scandurra
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引用次数: 209

Abstract

Summary form only given. The SoC (System on Chip) design demands for novel architectural and circuital solutions to cope with the global wires issue, pushing the on-chip communication as a crucial and precious resource. In the context of the communication centric paradigm and according to a layered based design, it is foreseen that current on-chip shared bus will be, at least partially, replaced by a micronetwork interconnection implementing a flexible packet-based communication (A. Jantsch and H. Tenhunen, "Networks on Chip", Kluwer Academic Publishers, 2003). We state that the availability of an efficient on-chip communication platform is one of the most important enabling factors for the development of efficient and cost effective multi processor SoC in the near and long-term future. This summary presents the low cost, high performance on-chip communication network, called Spidergon, developed by the AST (Advanced System Technology) of STMicroelectronics as the possible evolution of STBus technology.
Spidergon:一种新型片上通信网络
只提供摘要形式。SoC(片上系统)设计需要新颖的架构和电路解决方案来应对全球布线问题,推动片上通信成为至关重要和宝贵的资源。在以通信为中心范式的背景下,根据分层设计,可以预见当前的片上共享总线将至少部分地被实现灵活的基于分组的通信的微网络互连所取代(a . Jantsch和H. Tenhunen,“片上网络”,Kluwer学术出版社,2003)。我们指出,在近期和长期的未来,高效的片上通信平台的可用性是开发高效且具有成本效益的多处理器SoC的最重要因素之一。本文概述了意法半导体(STMicroelectronics)先进系统技术公司(AST)开发的低成本、高性能的片上通信网络Spidergon,作为STBus技术可能的发展方向。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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