Noise performance of 0.35-/spl mu/m SOI CMOS devices and micropower preamplifier from 77-400 K

Abstract

MOS transconductance and white noise is described from weak through strong inversion to facilitate the design of a 0.35-/spl mu/m, partially-depleted silicon-on-insulator (SOI) CMOS micropower, low noise preamplifier. This analysis is extended to cryogenic temperatures where MOS subthreshold slope is reduced significantly from its expected value. Transconductance and white noise for an input PMOS device in moderate inversion and non-input NMOS device in strong inversion are measured and compared to predicted values for 77-400 K. Transconductance increases, and input-referred white-noise voltage decreases at 77 K, while input-referred flicker noise remains relatively unchanged. Finally, a micropower, low-noise preamplifier is presented. The measured input-referred white noise is 69 nV/Hz/sup 1/2/ at 293 K dropping to 56 nV/Hz/sup 1/2/ at 86 K for a differential input stage bias current of 1 /spl mu/A. The flicker-noise corner frequency is approximately 20 Hz, permitting use with deep space mission sensors like gyros having low frequency output signals.