1/f Noise Analysis of a 75 nm Twin-Flash Technology Non-Volatile Memory Cell

Abstract

Analyzing the electrical degradation of modern flash memory cells by conventional C-Vor charge pumping techniques is hardly possible due to the extremely small gate area. However, 1/f noise measurements can be done since low frequency 1/f noise in the range around 1 Hz produced by stress-generated oxide traps strongly increases in MOSFETs with shrinking area. Here we show that measurements of the noise power spectral density enable the investigation of the degradation of the devices caused by hot carrier stress during write/erase cycling. In particular, we demonstrate that the oxide trap generation of a multi-bit cell like the Twin-FlashTM cell is mainly located at the stressed bit region.